In general, for manufacturing a semiconductor device, an etching process is performed to form a desired fine pattern on a thin film laminated on a semiconductor wafer (hereinafter, referred to as a ‘wafer’). In the etching process, a photolithography technology is employed to form a fine pattern circuit. Specifically, on an etching target layer to be etched, a photoresist material is uniformly coated first and dried; and subsequently, an exposure treatment is carried out on the photoresist film to transfer a pattern such as a fine circuit or the like by irradiating thereon a light beam of a predetermined wavelength.
If the photoresist material is a positive type, a part of the photoresist film, to which the light beam has been irradiated, is removed by performing a developing process thereon to thereby form a patterned mask layer. Thereafter, a plasma etching process or the like is carried out on the etching target layer to form a desired pattern thereof by using the mask layer as a mask.
In the manufacture of the semiconductor device, wherein various patterns are formed by using the photolithography technology as mentioned above, integration and miniaturization of a pattern dimension have been ever progressing. For example, in the semiconductor device, each pattern dimension gets smaller as the design rule thereof becomes finer. Since, however, miniaturization depends on resolution in the photolithography technology, a dimension, which can be formed by the photolithography method is the micro-processing limit.
Recently, there has been proposed an exposure method using a KrF eximer laser (248 nm) or an ArF eximer laser (193 nm) as an exposure light source. However, even with this exposure method, only about 60 nm wide critical dimension (CD) in a single wire can be attained. Further, attempts have been made to use therewith an off-axis illumination or a phase shift method. In the off-axis illumination method, however, an exposure time gets longer and a throughput is reduced since a part of the light source is shielded. Further, although the phase shift method improves the resolution, it complicates the method for manufacturing the mask. To overcome these shortcomings, Japanese Patent Laid-open Application No. H08-45906 discloses a method for etching the resist film to obtain a desired pattern after performing an ion implantation.
As described above, while there have been adopted various methods for performing a micro-processing in the manufacture of the semiconductor device, only about 60 nm wide CD is the limit which can be achieved through the conventional processing methods. For example, in case of the MOSFET semiconductor device, an improvement in a performance can be achieved if the gate length is reduced. However, it is difficult to make the gate length 50 nm or less using the current exposure technologies.